Huawei Technologies has unveiled a new chip architecture and scaling law it claims can deliver semiconductors equivalent to a 1.4-nanometre processing node by 2031 — without relying on advanced lithography equipment from Dutch supplier ASML. The announcement, made on Monday, 26 May 2026, represents the US-sanctioned company's most explicit attempt yet to chart a path around the export controls that have cut it off from the world's most advanced chipmaking tools since 2019. Analysts, however, caution that significant manufacturing hurdles remain.

What is the Tau Scaling Law?

For decades, the semiconductor industry has advanced by physically shrinking transistors — a trajectory codified in Moore's Law. Huawei's new Tau (τ) Scaling Law proposes a fundamentally different approach it calls 'time scaling'. Rather than making hardware components smaller, the method aims to boost performance by compressing the effective time constant (τ) — essentially accelerating how fast electrical signals travel across devices, circuits, and entire systems.

The practical implication, according to the company, is that improvements in lithography tooling are 'not necessary' under this new paradigm. He Tingbo, chair of the Huawei Scientist Committee and president of the company's semiconductor business department, made that assertion directly, signalling that Huawei believes it can achieve leading-edge performance without access to ASML's extreme ultraviolet (EUV) machines — equipment that remains off-limits to Chinese firms under US-led export restrictions.

Why it matters

The stakes are considerable. ASML's EUV lithography systems are the single most critical chokepoint in China's bid for semiconductor self-sufficiency, and Huawei has been unable to procure them since sanctions tightened. If the Tau Scaling Law delivers on its promise, it could allow China's domestic chip ecosystem — anchored by fabs such as SMIC — to produce chips competitive with those made by TSMC and Samsung at nodes as advanced as 1.4nm, using older deep ultraviolet (DUV) equipment.

That would mark a seismic shift in the global semiconductor landscape, reducing the leverage that US export controls currently exert over China's AI and advanced computing ambitions.

Analyst caution: hurdles remain

Despite the boldness of the claim, industry analysts warn that the announcement should be treated with measured scepticism. Translating a theoretical scaling law into mass-producible silicon involves yield engineering, materials science, and process integration challenges that go well beyond architectural innovation. China's domestic tooling ecosystem — spanning deposition, etching, and metrology equipment — still lags the global frontier in multiple dimensions.

The 2031 target also leaves a five-year execution window, during which TSMC and Samsung are expected to push further ahead on their own roadmaps, potentially widening the competitive gap even if Huawei's approach proves technically valid.

The competitive backdrop

Huawei's move comes as China's broader chip industry intensifies investment in alternative pathways — from chiplet packaging to 3D integration — to compensate for lithography constraints. The company's Kirin and Ascend chip lines have already demonstrated that SMIC's 7nm-equivalent DUV process can produce commercially competitive products, lending some credibility to the idea that architectural ingenuity can partially offset process-node disadvantages.

What's next

The semiconductor industry will now watch closely for peer-reviewed validation of the Tau Scaling Law, concrete silicon tape-outs, and any signal that domestic Chinese fabs can manufacture to the required specifications. Whether Huawei's 2031 milestone holds — and whether it narrows the gap with TSMC and Samsung meaningfully — will be among the defining questions of the next phase of the global chip race.