Vaishnaw Unveils Semicon 2.0 With ₹1,27,500 Cr Outlay
Synopsis
Key Takeaways
Union Minister Ashwini Vaishnaw announced Semicon 2.0, a revamped semiconductor policy framework carrying a total outlay of ₹1,27,500 crore, on Thursday, 16 July 2026. The programme expands India's chip ambitions across six distinct pillars, signalling a significant scale-up from the original India Semiconductor Mission launched in 2021.
Context
Vaishnaw, who holds the portfolio of Electronics and Information Technology alongside Railways and Information and Broadcasting, outlined the six pillars as: chip design, machines and materials, more fabrication units (fabs), strengthening of assembly, test, mark and pack (ATMP) and outsourced semiconductor assembly and test (OSAT) capacity, research and development, and talent development.
The announcement marks a formal articulation of the government's next-generation semiconductor strategy, building on early project approvals that had already set the foundation for domestic chip manufacturing.
Policy Backdrop
India's semiconductor push began in December 2021 when the Union Cabinet approved the India Semiconductor Mission (ISM) under the Ministry of Electronics and Information Technology (MeitY), with an initial outlay of ₹76,000 crore focused primarily on fabrication incentives, ATMP support, and design-linked schemes.
The first wave of project approvals followed in 2023–24, with Micron Technology receiving clearance for an ATMP facility in Sanand, Gujarat — the first major project under the mission — and Tata Electronics signing agreements for a semiconductor fab in Assam and an ATMP unit in Gujarat in partnership with PSMC of Taiwan.
Semicon 2.0's stated outlay of ₹1,27,500 crore represents a substantial increase over the original package, reflecting the government's intent to move beyond fabrication incentives into upstream design, materials, and human capital — areas that the first phase did not address as explicitly.
Stakeholders and Impact
The six-pillar structure directly addresses gaps identified by industry: India has historically been strong in chip design talent but weak in physical manufacturing infrastructure and the upstream materials and equipment supply chain. By explicitly naming machines and materials as a standalone pillar, the policy signals an intent to build domestic capability in an area currently dominated by a handful of countries.
For engineering graduates and the academic ecosystem, the talent development pillar is particularly significant. The semiconductor sector requires highly specialised skills, and a funded national programme could reshape curriculum priorities at technical institutions.
Electronics manufacturers who depend on imported chips — from consumer electronics to automotive and defence — stand to benefit from a deeper domestic supply chain, potentially reducing import dependence and supply-chain vulnerability.
What's Next
Formal Cabinet or MeitY notifications detailing disbursement timelines, eligibility criteria, and project approval processes under each of the six pillars will be the immediate markers to watch. The annual Semicon India conference has historically served as the primary platform for investment announcements and policy updates in this sector.
India's Semicon 2.0 framework arrives as the United States, European Union, Japan, and Taiwan are each running parallel programmes to diversify semiconductor supply chains away from concentrated East Asian production nodes — positioning India as a potential beneficiary of global friend-shoring trends if implementation timelines hold.