Chips to Startups: Over 68,000 students trained to power India's semiconductor design push
Synopsis
Key Takeaways
More than 68,000 students have been trained under the Chips to Startups (C2S) programme to date, as India accelerates efforts to build a self-reliant semiconductor chip design ecosystem, the government informed Parliament on 14 August. The programme targets a cumulative pool of 85,000 industry-ready professionals at the B.Tech, M.Tech, and PhD levels, specialised in semiconductor chip design.
Scale and Reach of the C2S Programme
Union Minister of State for Electronics and IT Jitin Prasada disclosed the figures in the Lok Sabha, noting that access to advanced Electronic Design Automation (EDA) tools — from companies including Synopsys, Cadence, Siemens EDA, Ansys, Keysight, Silvaco, Renesas-Altium, AMD-Xilinx, AsterQuanta, Compcarta, and Cadre — has been extended to 332 academic institutions across the country. These tools are the industry standard for chip design and are otherwise prohibitively expensive for most universities.
Participating institutions have successfully completed 254 chip tape-outs — a critical milestone in chip development that moves a design from simulation to physical fabrication. Of these, 175 designs were taped out at the 180 nm technology node at SCL, Mohali, while 79 designs went to overseas semiconductor foundries.
Andhra Pradesh's Role in the Ecosystem
In Andhra Pradesh, 23 academic institutions have been granted access to advanced EDA tools under the programme, with cumulative tool utilisation crossing 4.34 lakh hours. The projects are at various stages of design and development and are expected to advance toward prototype validation and tape-out at foundries, according to Prasada.
Electronics Hardware Technology Parks Boost Exports
Separately, Electronics Hardware Technology Parks (EHTP) have emerged as a significant pillar of India's export-oriented electronics manufacturing base. The number of operational EHTP units has grown to 79, with exports crossing ₹11,100 crore in FY2025-26. The scheme operates as a 100 per cent export-oriented programme, with the Software Technology Parks of India (STPI) providing statutory services through a single-window clearance system.
Eligible EHTP units benefit from duty-free import and procurement of capital goods, raw materials, components, consumables, and spares required for export production, in line with the Foreign Trade Policy 2023. Units are also permitted domestic tariff area sales and enjoy simplified customs procedures. Notably, there is no direct fund allocation under the EHTP scheme — benefits are entirely incentive and policy-driven.
What Comes Next
With the C2S programme still short of its 85,000-trainee target, the government is expected to intensify institutional outreach, particularly in states with emerging semiconductor ambitions. The tape-out pipeline — now at 254 designs — signals growing academic confidence in chip design, though the leap from academic prototype to commercial production remains the sector's defining challenge. As India's semiconductor policy matures, the C2S programme's output will be a key indicator of whether domestic design talent can anchor a broader fab-and-design ecosystem.